Cadence and Samsung Foundry Deepen Collaboration to Drive Innovation in AI, Automotive, and Connectivity Solutions
Cadence Design Systems (Nasdaq: CDNS) has announced a significant expansion of its collaboration with Samsung Foundry, reinforcing their shared commitment to advancing semiconductor design for cutting-edge applications. The partnership includes a new multi-year intellectual property (IP) agreement and the joint development of AI-driven design flows tailored for Samsung’s latest advanced process nodes, including the SF2P, SF4X, and SF4U nodes. This collaboration aims to deliver high-performance, low-power solutions for AI data centers, automotive systems—particularly advanced driver-assistance systems (ADAS)—and next-generation RF connectivity applications.
By leveraging Cadence’s AI-driven design tools and comprehensive portfolio of IP and silicon solutions, the companies are empowering designers to accelerate time-to-market (TTM) for complex system-on-chips (SoCs), chiplets, and 3D-ICs. These innovations are critical for meeting the demands of modern industries that rely on advanced semiconductor technologies.
Strengthening Collaboration Through Expanded IP Offerings
A cornerstone of this expanded partnership is a new multi-year IP agreement that broadens Cadence’s memory and interface IP solutions across Samsung Foundry’s advanced process nodes, including SF4X, SF5A, and SF2P. This agreement ensures that mutual customers have access to cutting-edge IP solutions optimized for AI, high-performance computing (HPC), and automotive applications.
The expanded SF4X IP portfolio now includes support for LPDDR6/5x-14.4G, GDDR7-36G, DDR5-9600, PCI Express® (PCIe®) 6.0/5.0/CXL 3.2, Universal Chiplet Interconnect Express™ (UCIe™)-SP 32G, and a 10G multi-protocol PHY (USB3.x, DP-TX, PCIe 3.0, and SGMII) with companion controller IP. These offerings enable complete subsystem silicon solutions, addressing the growing demand for high-speed, energy-efficient designs.
For automotive applications, the SF5A platform now features an LPDDR5X-8533 PHY IP optimized for reliability and performance in demanding environments. Additionally, a new 32G PCIe 5.0 PHY has been added to the SF2P offering, catering to the needs of leading AI and HPC customers.
“Cadence supports a full portfolio of IP, subsystems, and chiplets on Samsung Foundry process nodes, and this new multi-year IP agreement strengthens our ongoing collaboration,” said Boyd Phelps, senior vice president and general manager of the Silicon Solutions Group at Cadence. “By combining Cadence’s AI-driven design and silicon solutions with Samsung’s advanced processes, we’re delivering the leading-edge technologies our mutual customers need to innovate and bring their products to market faster.”
Hyung-Ock Kim, vice president and head of the Foundry Design Technology Team at Samsung Electronics, echoed this sentiment: “Cadence’s suite of digital tools from RTL to GDS is now certified for Samsung’s latest SF2P process node, supporting advancements like Hyper Cell and LLE 2.0 technologies. Cadence and Samsung are also collaborating closely to enable analog migration, enhance power integrity, and improve thermal and warpage analyses for 3D-ICs using GPU acceleration.”
Certification of Digital Full Flow for Advanced Process Nodes
As part of their ongoing collaboration, Cadence’s digital full flow has been certified for Samsung’s latest SF2P process node, incorporating the Samsung Hyper Cell methodology and Local Layout Effect (LLE) timing accuracy. This certification ensures that mutual customers can achieve signoff accuracy and runtime goals while benefiting from massive scalability, enabling faster TTM.
The Cadence Pegasus™ Verification System has also been certified for Samsung’s SF2P and other nodes. The optimized physical verification flow empowers designers to meet stringent design requirements efficiently, further accelerating development cycles.
Additionally, Cadence and Samsung are working together on design and technology co-optimization (DTCO) projects for next-generation process nodes, ensuring that future designs will continue to push the boundaries of performance and efficiency.
Advancements in Analog Migration and RF Co-Design
To address the challenges of technology scaling, Cadence and Samsung Foundry have successfully automated the migration of analog cell-based 4nm IP to the advanced 2nm process node. This breakthrough enables faster turnaround times while preserving functional and design intent, reducing development costs, and setting the stage for future migrations across various process nodes.
In the realm of RF design, the two companies have demonstrated a comprehensive Front-End Module (FEM)/Antenna-in-Package (AiP) co-design flow for next-generation mmWave applications based on Samsung’s 14nm FinFET process. By streamlining design data management across IC/module development stages—from initial system-level budgeting to RFIC/package co-design, analysis, and post-layout verification—the collaboration has significantly accelerated design turnaround times.
Power Integrity for 3D-ICs
Power integrity remains a critical focus area for 3D-IC designs, where managing thermal and electrical challenges is paramount. Cadence and Samsung have collaborated on a comprehensive full-flow power integrity analysis spanning the entire design process, from early exploration to final signoff. Leveraging advanced Cadence EDA tools such as Voltus™ InsightAI, the Innovus™ Implementation System, and the Integrity™ 3D-IC Platform, the teams achieved impressive results.
For example, when applied to a high-speed CPU chip using Samsung’s SF2 node, Voltus InsightAI resolved 80-90% of IR-drop violations with minimal impact on timing and power. This demonstrates the tool’s ability to balance power integrity with performance requirements, ensuring robust and reliable designs.
Driving Innovation Across Industries
The expanded partnership between Cadence and Samsung Foundry underscores their shared vision of delivering transformative technologies for AI data centers, automotive systems, and connectivity solutions. By combining Cadence’s AI-driven design tools and extensive IP portfolio with Samsung’s cutting-edge process nodes, the collaboration accelerates innovation and reduces TTM for customers.
As industries increasingly rely on advanced semiconductors to power everything from autonomous vehicles to AI-driven data centers, partnerships like this play a pivotal role in shaping the future of technology. With these advancements, Cadence and Samsung Foundry are not only addressing current market demands but also laying the groundwork for the next wave of semiconductor innovation.
Through their joint efforts, the companies are enabling designers to tackle complex challenges, optimize performance, and meet the ever-evolving needs of modern applications—ultimately driving progress across multiple sectors and setting new standards for excellence in semiconductor design.
About Cadence
Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence’s Intelligent System Design™ strategy, are essential for the world’s leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world’s top 100 best-managed companies. Cadence solutions offer limitless opportunities—learn more at www.cadence.com.
